Unit Outline

The unit will further develop the understanding of designing a controller in both frequency domain and time domain. The student will design both cascade and feedback configured compensators while considering the options of utilising major loop and minor loop. These compensator will then be constructed as active and passive PIDs using a root locus to meet specified output responses. The controllers are then compared to state-space controllers in phase-variable form and in controller canonical form, which allows complete specified position of the closed loop poles. The limitation of the state-space controller is addressed with an integral controller to reduce the steady state error in the output response. The designed controller can be transformed to any original system given transformation matrices derived from the state-space representation. The advantage of using an observer in observer canonical form to timely estimate state variables of higher order systems will be explored as system access may be restrictive. Although many designs are done in continuous systems, the are typically implemented as digital controller. The system specifications using z-transform to adjust the peak time, settling and percentage overshoot while considering the constraint of the sampling time will be explored. The use of bilinear transforms to obtain discrete filter representations of controller. The unit concludes by applying foundational skills in programmable logic controllers and supervisory control, industrial robotics, and machine vision to meet system specifications.

Intended Learning Outcomes

As per the Assessment and Results Policy 1.3, your results will reflect your achievement against specified learning outcomes.

On completion of this unit, you will be able to:


1	Design a feedback controller to improve transient and steady-state performance of a system to given specifications.
2	Design observers in state space to estimate and track the state variables of higher order systems.
3	Design a digital controller to meet system specifications in terms of the transient and steady-state performance considering the effects of sampling period.
4	Build, tune, and troubleshoot practical implementations of controllers.
5	Evaluate intelligent systems to control and manage industrial equipment.

Requisites


REQUISITE TYPE	REQUISITES
Pre-requisite	ENG331

Alterations as a result of student feedback

How will I be Assessed?

For more detailed assessment information please see MyLO.

Assessment schedule


ASSESSMENT TASK #	ASSESSMENT TASK NAME	DATE DUE	WEIGHT	LINKS TO INTENDED LEARNING OUTCOMES
Assessment Task 1:	Automation report	Week 11	30 %	LO3, LO4, LO5
Assessment Task 2:	Design report	Week 12	30 %	LO1, LO2
Assessment Task 3:	Exam	Exam Period	40 %	LO1, LO2, LO3

Assessment details

Assessment Task 1: Automation report

Task Description:

Following a laboratory exercise including programming PLCs, operating and programming industrial robots, and developing SCADA systems and interfaces, students will write a short design report on developing an intelligent system for controlling and managing industrial plant to achieve defined automation task:
(1) Scope the automation task which can utilise PLCs, SCADA, industrial robots, and any other industrial equipment or models.
(2) Model and simulate the system.
(3) Develop controllers and supervisory and control software.
(4) Implement the designed solution using the equipment available.
(5) Evaluate the system in comparison with the modelled system.
If a pass grade is not achieved for assessment criteria 1, 3 or 4, then students will be required to resubmit and these criteria will be reassessed in order to pass ILOs 4 & 5.
GenAI use is permitted (with acknowledgement).

Task Length:

Two laboratory sessions and submission of 6 page design report.

Due Date:

Week 11

Weight:

30 %

CRITERION #

CRITERION

MEASURES INTENDED

LEARNING OUTCOME(S)


1	Design and implement a robotic interface to specifications.	LO5
2	Design a digital controller in PLC.	LO3
3	Interface a PLC to SCADA for control over industrial plant.	LO4
4	Evaluate the performance of the system.	LO5

Assessment Task 2: Design report

Task Description:

Design project: This is a software-based design of a controller. Students will be tasked to investigate an unknown high-order plant and measure key parameters. Using their knowledge covered in class, they need to design a controller(s) to engage the plant to produce a certain desired output. The group will be posed with several unknown issues and will need to design, simulate and troubleshoot their design.
Students will be assessed through a number of complementary components including:
(1) Group final report - Written group report of 10 pages (maximum)
(2) Short summary of their individual contribution - Written individual report of 1 page (maximum)
(3) Technical group interview to discuss their design choices - Group interview of 10 minutes (maximum)
GenAI use is permitted (with acknowledgement).

Task Length:

12 page submitted design report

Due Date:

Week 12

Weight:

30 %

CRITERION #

CRITERION

MEASURES INTENDED

LEARNING OUTCOME(S)


1	Design a feedback compensator to mitigate the effects of unwanted dominant poles.	LO1
2	Evaluate the observer output to estimate if controller is working to specification.	LO2
3	Design a low pass filter in a controller to mitigate effects of persistent oscillations.	LO1
4	Implement a cascade controller to accelerate the system's response time.	LO1
5	Design a state-space controller to meet system specification.	LO1, LO2

Assessment Task 3: Exam

Task Description:

In the exam the student will answer questions to demonstrate their ability to design frequency domain and time domain controllers. These designs can either manifest as continuous or discrete control implementations.
GenAI use is not permitted.

Task Length:

3-hour invigilated examination

Due Date:

Exam Period

Weight:

40 %

CRITERION #

CRITERION

MEASURES INTENDED

LEARNING OUTCOME(S)


1	Design a state-space controller that meet design specifications and consider relevant trade-offs.	LO1, LO2
2	Design PID controllers that meet design specifications and consider trade-offs.	LO1
3	Design a digital controller that meet design specifications and consider the effects of sampling periods.	LO3

How your final result is determined

To pass this unit, you need to demonstrate your attainment of each of the Intended Learning Outcomes, achieve a final unit grade of 50% or greater, and pass any hurdle tasks.

Academic progress review

The results for this unit may be included in a review of your academic progress. For information about progress reviews and what they mean for all students, see Academic Progress Review in the Student Portal.

Submission of assignments

Where practicable, assignments should be submitted to an assignment submission folder in MYLO. You must submit assignments by the due date or receive a penalty (unless an extension of time has been approved by the Unit Coordinator). Students submitting any assignment in hard copy, or because of a practicum finalisation, must attach a student cover sheet and signed declaration for the submission to be accepted for marking.

Academic integrity

Academic integrity is about acting responsibly, honestly, ethically, and collegially when using, producing, and communicating information with other students and staff members.

In written work, you must correctly reference the work of others to maintain academic integrity. To find out the referencing style for this unit, see the assessment information in the MyLO site, or contact your teaching staff. For more detail about Academic Integrity, see Important Guidelines & Support.

Requests for extensions

If you are unable to submit an assessment task by the due date, you should apply for an extension.

A request for an extension should first be discussed with your Unit Coordinator or teaching support team where possible. A request for an extension must be submitted by the assessment due date, except where you can provide evidence it was not possible to do so. Typically, an application for an extension will be supported by documentary evidence: however, where it is not possible for you to provide evidence please contact your Unit Coordinator.

The Unit Coordinator must notify you of the outcome of an extension request within 3 working days of receiving the request.

Late penalties

Assignments submitted after the deadline will receive a late penalty of 5% of the original available mark for each calendar day (or part day) that the assignment is late. Late submissions will not be accepted more than 10 calendar days after the due date, or after assignments have been returned to other students on a scheduled date, whichever occurs first. Further information on Late Penalties can be found on the Assessments and Results Procedure.