Unit Outline

This unit builds on the foundational principles introduced in Year 1, focusing on the design and analysis of analogue and mixed-signal electronic circuits. Students will analyse circuits containing semiconductor components and how they can be used for signal conditioning, power management, and circuit performance in real-world applications, applying DC and AC analysis techniques to components such as diodes, transistors, amplifiers, and operational amplifiers. Emphasis is placed on designing efficient and reliable electronic systems while considering energy efficiency and environmental compliance.

Through a combination of theoretical analysis, laboratory experiments, and problem-solving assignments, students will develop the skills to evaluate circuit performance, mitigate non-ideal characteristics of operational amplifiers, and design circuits that meet safety and regulatory standards.

This unit provides the essential circuit-level knowledge required for Embedded System Fundamentals, where microcontrollers interface with analogue components, and supports Power Electronics.

Intended Learning Outcomes

As per the Assessment and Results Policy 1.3, your results will reflect your achievement against specified learning outcomes.

On completion of this unit, you will be able to:


1	Analyse linear analogue circuits containing transistors to model AC responses, operational points, bandwidth analysis and signal ampliﬁcation.
2	Analyse electronic systems to evaluate their energy efficiency and climate impact.
3	Design mixed-signal electronics hardware ensuring efficiency and compliance with environmental standards.
4	Quantify circuit performance while considering the non-ideal characteristics of operational amplifiers

Requisites


REQUISITE TYPE	REQUISITES
Pre-requisite	ENG108 Electrical Engineering Foundations

Alterations as a result of student feedback

How will I be Assessed?

For more detailed assessment information please see MyLO.

Assessment schedule


ASSESSMENT TASK #	ASSESSMENT TASK NAME	DATE DUE	WEIGHT	LINKS TO INTENDED LEARNING OUTCOMES
Assessment Task 1:	Mid-Term Test	Week 7	20 %	LO1, LO2, LO3
Assessment Task 2:	Laboratory	Refer to Assessment Description	40 %	LO1, LO3, LO4
Assessment Task 3:	Exam	Exam Period	40 %	LO1, LO2, LO3, LO4

Assessment details

Assessment Task 1: Mid-Term Test

Task Description:

This mid term test will formative aid the students in mastering ILO1-2 and start exploring ILO3. Students will complete this test during the semester to demonstrate their formative understanding of the content.
Generative AI use is not permitted.

Task Length:

90 minutes

Due Date:

Week 7

Weight:

20 %

CRITERION #

CRITERION

MEASURES INTENDED

LEARNING OUTCOME(S)


1	Calculate the DC Q-point for a diode, BJT and FET transistor	LO1
2	Derive the input impedance, output impedance, current gain and voltage gain for transistor circuit	LO1
3	Explain the construction of semiconductor components.	LO2
4	Describe various doping methods of semiconductor material and their applications.	LO2
5	Investigate the effects on transistor circuits under various loading conditions.	LO3

Assessment Task 2: Laboratory

Task Description:

3x laboratory sessions constructing and design circuits
(1) Lab task 1 will start in week 2 and conclude in week 4 (weeks 2-3 are prep-work, week 4 is practical, submission in week 4)
(2) Lab task 2 will start in week 5 and conclude in week 7 (weeks 5-6 are prep-work, week 7 is practical, submission in week 7)
(3) Lab task 3 will start in week 8 and conclude in week 11 (weeks 8-9 are prep-work, weeks 10-11 is practical, submission in week 12)

The students will complete 3 laboratory experiments to explore the underlying physical principles and transistor circuit operation. Lab sessions will require a pre-lab exercise to be completed prior to the lab. These labs provide a hands-on experience, allow students to construct, measurement and test, exhibit safe work practices, and analyse various circuit behaviour.

Laboratory work will be completed in pairs with a proforma to be completed individually and submitted one week after the lab session. Student will complete peer review as part of their submission.

The construction and measurement techniques learned, and analysis undertaken during the lab activities will equip students to undertake all other assessment tasks in this unit by providing a hands-on experience of the characteristics and operation electrical machines.

The last session introduces students to key elements of the electrical design process. These skills will further be developed later in units that focus on interconnecting systems with each other.

Generative AI use is permitted in completion of lab proforma but must be acknowledged.

Task Length:

9-hours

Due Date:

Refer to Assessment Description

Weight:

40 %

CRITERION #

CRITERION

MEASURES INTENDED

LEARNING OUTCOME(S)


1	Calculate the DC Q-point for a diode, BJT and FET transistor	LO1
2	Derive the input impedance, output impedance, current gain and voltage gain for transistor circuit	LO1
3	Compute the lower operating frequency of a linear circuit containing energy storing components.	LO1
4	Derive the bandwidth of a transistor circuit under various loading conditions.	LO1
5	Compute the high operating frequency of a transistor circuit by considering the parasitic effects of the components.	LO4
6	Design amplifier to meet safety regulations for defined environment.	LO3
7	Design and build a transistor amplifier circuit to meet specifications of sensors and actuators.	LO3

Assessment Task 3: Exam

Task Description:

The final exam will formally evaluate ILO1, ILO2, ILO3 and ILO4.

The exam will be centrally invigilated and will assess all non-practical unit content.
Students will apply fundamental principles of circuit analysis to define system behaviour comprised of semiconductor components.

Generative AI use is not permitted.

Task Length:

3 hours

Due Date:

Exam Period

Weight:

40 %

CRITERION #

CRITERION

MEASURES INTENDED

LEARNING OUTCOME(S)


1	Design operational amplifiers circuits while mitigating the effects of non-ideal characteristic.	LO4
2	Derive input offset currents and voltages of operational amplifiers.	LO4
3	Investigate the effects of diodes and transistors connected to operational amplifiers	LO4
4	Identify common operational amplifier circuits designs in complex circuits.	LO4
5	Analyse and derive complex circuits with operational amplifiers.	LO4
6	Define and measure gain-bandwidth product for range of operations.	LO3
7	Investigate the effects on transistor circuits under various loading conditions.	LO3
8	Derive the bandwidth of a transistor circuit under various loading conditions.	LO1
9	Compute the high operating frequency of a transistor circuit by considering the parasitic effects of the components.	LO1
10	Compute the lower operating frequency of a linear circuit containing energy storing components.	LO1
11	Analyse different transistor circuit designs and the power efficiency	LO2

How your final result is determined

To pass this unit, you need to demonstrate your attainment of each of the Intended Learning Outcomes, achieve a final unit grade of 50% or greater, and pass any hurdle tasks.

Academic progress review

The results for this unit may be included in a review of your academic progress. For information about progress reviews and what they mean for all students, see Academic Progress Review in the Student Portal.

Submission of assignments

Where practicable, assignments should be submitted to an assignment submission folder in MYLO. You must submit assignments by the due date or receive a penalty (unless an extension of time has been approved by the Unit Coordinator). Students submitting any assignment in hard copy, or because of a practicum finalisation, must attach a student cover sheet and signed declaration for the submission to be accepted for marking.

Academic integrity

Academic integrity is about acting responsibly, honestly, ethically, and collegially when using, producing, and communicating information with other students and staff members.

In written work, you must correctly reference the work of others to maintain academic integrity. To find out the referencing style for this unit, see the assessment information in the MyLO site, or contact your teaching staff. For more detail about Academic Integrity, see Important Guidelines & Support.

Requests for extensions

If you are unable to submit an assessment task by the due date, you should apply for an extension.

A request for an extension should first be discussed with your Unit Coordinator or teaching support team where possible. A request for an extension must be submitted by the assessment due date, except where you can provide evidence it was not possible to do so. Typically, an application for an extension will be supported by documentary evidence: however, where it is not possible for you to provide evidence please contact your Unit Coordinator.

The Unit Coordinator must notify you of the outcome of an extension request within 3 working days of receiving the request.

Late penalties

Assignments submitted after the deadline will receive a late penalty of 5% of the original available mark for each calendar day (or part day) that the assignment is late. Late submissions will not be accepted more than 10 calendar days after the due date, or after assignments have been returned to other students on a scheduled date, whichever occurs first. Further information on Late Penalties can be found on the Assessments and Results Procedure.