Unit Outline

The unit extends the physics of electrical phenomena when wavelength is small relative to system physical dimensions. The unit introduces an analysis and design, as well as phenomena encountered when wavelength is short relative to the physical dimensions of an electrical system. The student will study signal and current wave propagation along conductors in electrical structures. This study will lead into an introduction to transmission line theory, dealing with the distributed nature of circuits and systems when propagation delays are significant. Concepts such as reflection coefficients, impedance transformation and Smith charts are studied. Based on transmission line theory, multiport networks are introduced and studied. This includes S-parameters, Z-parameters and signal flow graphs, which makes the analysis and design of networks possible. The modelling of active high frequency components are also considered, including diodes, junction transistors and field effect transistors. Matching networks are studied (to enable maximum power transfer and reduce standing wave ratios). This includes discrete component matching networks (T and PI networks) and microstrip line matching networks. High frequency transistor amplifiers are studied, which include high frequency biasing, stability, gain, noise figure and multistage amplifiers. Students are assumed to have basic knowledge of electronic and electrical components such as transformers and other passive components. Finally, oscillator design will be investigated with non-linear effects such as higher order distortion.

Intended Learning Outcomes

As per the Assessment and Results Policy 1.3, your results will reflect your achievement against specified learning outcomes.

On completion of this unit, you will be able to:


1	Analyse high-frequency propagation, standing wave ratios, distributed impedance and reflections using transmission line theory and Smith charts.
2	Analyse electrical structures where active components require high-frequency modelling, and propagation delays are not insignificant
3	Design high frequency multiport circuits using S and Z parameters, as well as signal flow graphs.
4	Design high-frequency multistage amplifiers, including the case where the amplifiers require impedance matching networks.
5	Investigate impacts on transmission line performance due to small changes in the structure of high frequency circuits

Requisites


REQUISITE TYPE	REQUISITES
Pre-requisite	ENG722 Control Systems 1 ENG750 Signals and Linear Systems

Alterations as a result of student feedback

No changes based on previous feedback

How will I be Assessed?

For more detailed assessment information please see MyLO.

Assessment schedule


ASSESSMENT TASK #	ASSESSMENT TASK NAME	DATE DUE	WEIGHT	LINKS TO INTENDED LEARNING OUTCOMES
Assessment Task 1:	Semester test	Week 8	20 %	LO1, LO2
Assessment Task 2:	Design Report	Week 11	30 %	LO1, LO2, LO3, LO4, LO5
Assessment Task 3:	Assessed tutorials	Refer to Assessment Description	20 %	LO1, LO2, LO3, LO4, LO5
Assessment Task 4:	Exam	Exam Period	30 %	LO1, LO2, LO3, LO4, LO5

Assessment details

Assessment Task 1: Semester test

Task Description:

2-hour written invigilated test covering the first half of the unit's content.

Task Length:

2-hour invigilated closed book test

Due Date:

Week 8

Weight:

20 %

CRITERION #

CRITERION

MEASURES INTENDED

LEARNING OUTCOME(S)


1	Solve problems relating to propagation properties of high frequency waves in a timed scenario.	LO1
2	Produce analytical expected responses of high frequency active components in a timed scenario.	LO2

Assessment Task 2: Design Report

Task Description:

A take home assignment will be provided, where a typical real world problem is described. A detailed report with analysis results are submitted. Students can work in groups of up to two. A RF circuit will be designed and integrated with the transmission line where reflected waves propagate. Students will have to mitigate all the impairments due to reflections using optimisation techniques. This will be performed making use of S and/or Z parameters, as well as signal flow graphs.

Task Length:

Written report - 12 page maximum (appendices excluded)

Due Date:

Week 11

Weight:

30 %

CRITERION #

CRITERION

MEASURES INTENDED

LEARNING OUTCOME(S)


1	Calculate standing wave ration and reflection coefficients	LO1
2	Verify that correct models are used for active components	LO2
3	Design a stable circuit that has required parameters including bandwidth, gain and stability margins	LO2, LO3, LO4
4	Check that correct models of amplifier components have been deployed.	LO4
5	Check that impedance matching has been achieved.	LO4
6	Optimise the structure to improve overall performance of system	LO5

Assessment Task 3: Assessed tutorials

Task Description:

In these sessions students will solve a series of problems relating to the relevant covered in a week. These sessions will conclude with the student submitting their work for assessment

Task Length:

13x 1-hour tutorial sessions (weekly)

Due Date:

Refer to Assessment Description

Weight:

20 %

CRITERION #

CRITERION

MEASURES INTENDED

LEARNING OUTCOME(S)


1	Investigate various aspects of high frequency wave propagation.	LO1
2	Model high frequency circuits using active components.	LO2
3	Investigate and design new systems operating at high frequencies.	LO3
4	Design multistage amplifiers operating in the high frequency range	LO4
5	Analytical investigate the effects of transmission lines on high frequency circuits.	LO5

Assessment Task 4: Exam

Task Description:

3-hour written invigilated exam covering all unit content.

Task Length:

3-hour exam

Due Date:

Exam Period

Weight:

30 %

CRITERION #

CRITERION

MEASURES INTENDED

LEARNING OUTCOME(S)


1	Solve problems relating to propagation properties of high frequency waves in a timed scenario.	LO1
2	Produce analytical expected responses of high frequency active components with emphasis on propagation delays in a timed scenario.	LO2
3	Investigate and design appropriate multi-port circuits in a timed scenario.	LO3
4	Design multistage amplifiers operating in the high frequency range in a timed scenario	LO4
5	Analyse the transmission line effects on high frequency circuits in a timed scenario.	LO5

How your final result is determined

To pass this unit, you need to achieve a final unit mark of 50% or greater, AND demonstrate your attainment of each of the Intended Learning Outcomes.

Specifically:

you must achieve an average of 40% on final exam questions related to ILO1, semester test questions related to ILO1, assessed tutorial questions related to ILO1, and design report parts related to ILO1.

you must achieve an average of 40% on final exam questions related to ILO2, semester test questions related to ILO2, assessed tutorial questions related to ILO2, and design report parts related to ILO2.

you must achieve an average of 40% on final exam questions related to ILO3, assessed tutorial questions related to ILO3, and design report parts related to ILO3.

you must achieve an average of 40% on final exam questions related to ILO4, assessed tutorial questions related to ILO4, and design report parts related to ILO4.

you must achieve an average of 40% on final exam questions related to ILO5, assessed tutorial questions related to ILO5, and design report parts related to ILO5.

Relevant mid-semester test, exam, design report and tutorial questions items specifically identified as relating to all ILOs, weighted according to their contributions to the final unit mark, may be taken into account in determining attainment of these ILOs, if insufficient marks are obtained on the ordinary exam. These will not be counted if supplementary assessment is required. Any opportunities granted for supplementary assessment if you do not meet an ILO will be strictly in accordance with the UTAS Assessment and Results Procedure.

Refer to the Assessment and Results Procedure for further information.

Academic progress review

The results for this unit may be included in a review of your academic progress. For information about progress reviews and what they mean for all students, see Academic Progress Review in the Student Portal.

Submission of assignments

Where practicable, assignments should be submitted to an assignment submission folder in MYLO. You must submit assignments by the due date or receive a penalty (unless an extension of time has been approved by the Unit Coordinator). Students submitting any assignment in hard copy, or because of a practicum finalisation, must attach a student cover sheet and signed declaration for the submission to be accepted for marking.

Academic integrity

Academic integrity is about acting responsibly, honestly, ethically, and collegially when using, producing, and communicating information with other students and staff members.

In written work, you must correctly reference the work of others to maintain academic integrity. To find out the referencing style for this unit, see the assessment information in the MyLO site, or contact your teaching staff. For more detail about Academic Integrity, see Important Guidelines & Support.

Requests for extensions

If you are unable to submit an assessment task by the due date, you should apply for an extension.

A request for an extension should first be discussed with your Unit Coordinator or teaching support team where possible. A request for an extension must be submitted by the assessment due date, except where you can provide evidence it was not possible to do so. Typically, an application for an extension will be supported by documentary evidence: however, where it is not possible for you to provide evidence please contact your Unit Coordinator.

The Unit Coordinator must notify you of the outcome of an extension request within 3 working days of receiving the request.

Late penalties

Assignments submitted after the deadline will receive a late penalty of 5% of the original available mark for each calendar day (or part day) that the assignment is late. Late submissions will not be accepted more than 10 calendar days after the due date, or after assignments have been returned to other students on a scheduled date, whichever occurs first. Further information on Late Penalties can be found on the Assessments and Results Procedure.