Unit Outline

Introduction to fundamentals of control designer concepts. Signal flow graphs will be covered with focus on cascade, parallel, controller canonical, observer canonical and phase variable forms. Frequency domain (PID) designs will be covered using a root locus to improve steady state errors and transient responses. Both cascade and feedback compensators will be considered along with the effects of both major loop and minor loop feedback configurations. Physical realisable systems for these configurations will then be shown. Time domain (state space) controllers will be used to determine pole placement strategies. Controllability and observability concepts will be introduced along with their respective transformation matrices. Feedback controllers using phase-variable, controller canonical and observer canonical forms will be discussed. State space integral controllers to improve steady state errors in time domain design will be shown. The z-transform will be discussed using basic sampling (ADC/DAC) concepts. Deriving a pulse transfer function using phantom samplers will be shown. Digital controller design concepts will be shown by mapping to the z-plane. Investigating the stability and other applications through proper selection bilinear transformation techniques. Digital controllers will be designed to meet a specified desired response using the root locus.

Intended Learning Outcomes

As per the Assessment and Results Policy 1.3, your results will reflect your achievement against specified learning outcomes.

On completion of this unit, you will be able to:


1.	Analyse complex dynamic systems, and develop empirical models from process data.
2.	Design advanced controllers in the time and frequency domains.
3.	Implement advanced loop control strategies applied in the process industry.
4.	Design, tune and troubleshoot practical implementations of industrial PID controllers.
5.	Explain how relevant applied research may inform the modern practice of advanced process control engineering.

Requisites


REQUISITE TYPE	REQUISITES
Pre-requisite	ENG722

Alterations as a result of student feedback

How will I be Assessed?

For more detailed assessment information please see MyLO.

Assessment schedule


ASSESSMENT TASK #	ASSESSMENT TASK NAME	DATE DUE	WEIGHT	LINKS TO INTENDED LEARNING OUTCOMES
Assessment Task 1:	Laboratory	Week 11	20 %	LO1, LO4
Assessment Task 2:	Design project	Week 13	40 %	LO1, LO4, LO5
Assessment Task 3:	Final exam	Exam Period	30 %	LO1, LO2, LO3, LO4
Assessment Task 4:	Assessed tutorials	Refer to Assessment Description	10 %	LO1, LO2, LO3

Assessment details

Assessment Task 1: Laboratory

Task Description:

Two laboratories in the unit will be held in weeks 7-11 (depending on enrolments). They primarily develop competency in analysing, design and building controller and measuring responses from the system.

Task Length:

Written report 8 pages (maximum)

Due Date:

Week 11

Weight:

20 %

CRITERION #

CRITERION

MEASURES INTENDED

LEARNING OUTCOME(S)


1	Derive system equations for third order plant.	LO1
2	Implement PID controllers to control plant to produce desired response	LO4

Assessment Task 2: Design project

Task Description:

Design project: This is a software-based design of an controller. Students will be tasked to investigate an unknown high-order plant (fifth order or higher) and measure key parameters. Using their knowledge covered in class, they need to design an controller(s) to engage the plant to produce a certain desired output. The group will be posed with several unknown issues and will need to design, simulate and troubleshoot their design.

Students will be assessed through a number of complementary components including;
(1) Group final report
(2) Short summary of their individual contribution
(3) Technical group interview to discuss their design choices.

Task Length:

Written group report of 14 pages (maximum). Written individual report of 1 page (maximum). Group interview of 10 minutes (maximum).

Due Date:

Week 13

Weight:

40 %

CRITERION #

CRITERION

MEASURES INTENDED

LEARNING OUTCOME(S)


1	Derive a approximated model of plant based on input-output measurements.	LO1
2	Implement time/frequency domain controllers	LO4
3	Critically apply peer-reviewed research to industrially relevant control problems	LO5

Assessment Task 3: Final exam

Task Description:

The final exam is conducted in the formal examination period. See the Examinations and Results page: http://www.utas.edu.au/exams/ on the University's website, or access your personal exams timetable by logging into the eStudent Centre - Personal Exams Timetable for specific date, time and location closer to the examination period.

Task Length:

3-hour exam

Due Date:

Exam Period

Weight:

30 %

CRITERION #

CRITERION

MEASURES INTENDED

LEARNING OUTCOME(S)


1	Obtain simple low-order parametric models from input-output data	LO1
2	Design simple controllers that meet both time- and frequency-domain design specifications considering any relevant trade-offs	LO2
3	Design feedback and feedforward controllers considering any relevant trade-offs	LO3, LO4

Assessment Task 4: Assessed tutorials

Task Description:

In these weekly tutorial sessions students will solve a series of control theory problems. These sessions will conclude with the student submitting their work for assessment.

Task Length:

13x 1-hour tutorial sessions weekly

Due Date:

Refer to Assessment Description

Weight:

10 %

CRITERION #

CRITERION

MEASURES INTENDED

LEARNING OUTCOME(S)


1	Derive system responses from given plant and controller	LO1
2	Design a controller obtain the desired output response	LO2
3	Investigate the control effects of major and minor loops.	LO3

How your final result is determined

To pass this unit, you need to demonstrate your attainment of each of the Intended Learning Outcomes, achieve a final unit grade of 50% or greater, and pass any hurdle tasks.

Submission of assignments

Where practicable, assignments should be submitted to an assignment submission folder in MYLO. You must submit assignments by the due date or receive a penalty (unless an extension of time has been approved by the Unit Coordinator). Students submitting any assignment in hard copy, or because of a practicum finalisation, must attach a student cover sheet and signed declaration for the submission to be accepted for marking.

Requests for extensions

If you are unable to submit an assessment task by the due date, you should apply for an extension.

A request for an extension should first be discussed with your Unit Coordinator or teaching support team where possible. A request for an extension must be submitted by the assessment due date, except where you can provide evidence it was not possible to do so. Typically, an application for an extension will be supported by documentary evidence: however, where it is not possible for you to provide evidence please contact your Unit Coordinator.

The Unit Coordinator must notify you of the outcome of an extension request within 3 working days of receiving the request.

Late penalties

Assignments submitted after the deadline will receive a late penalty of 5% of the original available mark for each calendar day (or part day) that the assignment is late. Late submissions will not be accepted more than 10 calendar days after the due date, or after assignments have been returned to other students on a scheduled date, whichever occurs first. Further information on Late Penalties can be found on the Assessments and Results Procedure.

Review of results and appeals

You are entitled to ask for a review of the marking and grading of your assessment task if there is an irregularity in the marking standards or an error in the process for determining the outcome of an assessment. Details on how to request a review of a mark for an assignment are outlined in the Review and Appeal of Academic Decisions Procedure.