Unit Outline
School of Information and Communication Technology
College of Sciences and Engineering
KIT308
Multicore Architecture and Programming
Semester 2, 2023
Ian Lewis
CRICOS Provider Code: 00586B
 
Unit Coordinator
Ian Lewis
Email: Ian.Lewis@utas.edu.au
 
 
What is the Unit About?
Unit Description
This unit exposes students to historical approaches to increased processor efficiency, such as pipelining and superscalar design, before concentrating on a key concept of modern computer architectures: multicores. Both CPU and GPU architectures will be explored in this context and likely future hardware trends will be discussed. Students will learn the concepts and techniques for writing CPU multithreaded programs via the use of threading and synchronisation primitives as well as techniques for general-purpose GPU programming (GPGPU). A major focus of this unit is real world optimisation. Students will be exposed to data-oriented design approaches, revisit the concepts of Big-O efficiency and OO, and will get practical experience at profiling code. Additionally, students will learn lower-level programming techniques such as single-instruction multiple-data (SIMD) instructions, branch removal, and loop unrolling.
Intended Learning Outcomes
As per the Assessment and Results Policy 1.3, your results will reflect your achievement against specified learning outcomes.
On completion of this unit, you will be able to:
3
Develop and evaluate techniques for the creation of efficient multicore CPU and GPU programs by applying high performance programming principles and technical skills
4
Evaluate the performance and identify strengths and weaknesses of potential solutions targeting high-performance architecture
1
Explain the concepts of high-performance computer architecture and the impact of concepts on expected performance
2
Analyse a problem to define the requirements to target high-performance computer architecture
Requisites
REQUISITE TYPE
REQUISITES
Pre-requisite
KIT205 OR KIT206 OR KIT207 OR KIT208
Alterations as a result of student feedback
Assignment difficulty has been re-balanced.
 
 
Teaching arrangements
ATTENDANCE MODE
TEACHING TYPE
LEARNING ACTIVITY
CONTACT HOURS
FREQUENCY
On Campus
Lecture
A real-time (i.e. synchronous) interactive activity involving the whole class whose primary purpose is the presentation and structuring of information/ideas/skills to facilitate student learning. All students are expected to attend.
2
Weekly
Independent Learning
Involving reading, listening to audio, watching video, and/or completing exercises and/or quizzes, self-study is individual work undertaken when the student chooses (i.e. asynchronous), through engagement with MyLO. The content is examinable, and generally needs to be completed prior to attending Tutorial classes and/or attempting assessment tasks.
2
Weekly
Tutorial
A structured real-time (i.e. synchronous) computer-based activity in a small-group setting where the primary purpose is the clarification, exploration or reinforcement of subject content presented or accessed at another time or place (e.g. lecture, preparatory work). It is teacher supported and may involve student-teacher and/or student-student interaction and dialogue for achievement of its learning outcomes. The students enrolled in the class are expected to attend.
2
Weekly
Workshop
A structured real-time (i.e. synchronous) activity that involves a mix of presentation of new information/ideas/skills and guided activities related to that information/ideas/skills. This is an optional activity, but students are encouraged to attend.
2
Weekly
Attendance/Engagement Expectations
It is expected that you will attend all on-campus and onsite learning activities. This is to support your own learning and the development of a learning community within the unit.
 
If you miss a learning activity for a legitimate reason (e.g., illness, family commitments) teaching staff will attempt to provide alternative activities (e.g., make up readings) where it is possible.
 
If you are unable to attend regularly, please discuss the situation with your course coordinator and/or our UConnect support team.
 
 
 
 
How will I be Assessed?
Assessment schedule
ASSESSMENT TASK #
ASSESSMENT TASK NAME
DATE DUE
WEIGHT
LINKS TO INTENDED LEARNING OUTCOMES
ASSESSMENT TASK 1:
Multicore CPU Programming Assignment
Week 6
15 %
LO2, LO3, LO4
ASSESSMENT TASK 2:
CPU Optimisation Programming Assignment
Week 10
15 %
LO2, LO3, LO4
ASSESSMENT TASK 3:
GPU Programming Assignment
Week 13
15 %
LO2, LO3, LO4
ASSESSMENT TASK 4:
Examination
Week 14
40 %
LO1, LO2, LO3, LO4
ASSESSMENT TASK 5:
In-Tutorial Assessment
Refer to Assessment Description
15 %
LO1, LO2, LO3, LO4
Assessment details
Assessment Task 1: Multicore CPU Programming Assignment
TASK DESCRIPTION:
This assessment task requires students to use multicore CPU programming techniques to
solve a problem. Students will also measure the performance of each developed version of the program and analyse the data compared to the expected performance on the targeted system.

TASK LENGTH:
N/A
DUE DATE:
Week 6
WEIGHT:
15 %
 
CRITERION #
CRITERION
MEASURES INTENDED LEARNING OUTCOME
1
Develop a basic multithreaded CPU implementation.
LO2, LO3
2
Develop a dynamically balanced line-based multithreaded CPU implementation.
LO2, LO3
3
Develop a dynamically balanced square-based multithreaded CPU implementation.
LO2, LO3
4
Measure and analyse the performance of each developed multithreaded CPU version of the program in comparison to the expected performance on the targeted system.
LO4
 
Assessment Task 2: CPU Optimisation Programming Assignment
TASK DESCRIPTION:
This assessment task requires students to optimise the implementation of solution to a
problem. Students will also measure the performance of each developed version of the program and analyse the data compared to the expected performance on the targeted system.

TASK LENGTH:
N/A
DUE DATE:
Week 10
WEIGHT:
15 %
 
CRITERION #
CRITERION
MEASURES INTENDED LEARNING OUTCOME
1
Develop an implementation using WTIOTIM techniques.
LO2, LO3
2
Develop an implementation using SoA techniques.
LO2, LO3
3
Develop an implementation using SIMD techniques.
LO2, LO3
4
Measure and analyse the performance of each developed optimised version of the program in comparison to the expected performance on the targeted system.
LO4
 
 
Assessment Task 3: GPU Programming Assignment
TASK DESCRIPTION:
This assessment task requires students to use GPU programming techniques to solve a
problem. Students will also measure the performance of each developed version of the program and analyse the data compared to the expected performance on the targeted system.

TASK LENGTH:
N/A
DUE DATE:
Week 13
WEIGHT:
15 %
 
CRITERION #
CRITERION
MEASURES INTENDED LEARNING OUTCOME
1
Develop an OpenCL implementation for data transfer.
LO2, LO3
2
Develop an OpenCL implementation for calculation.
LO2, LO3
3
Develop a job-based OpenCL implementation.
LO2, LO3
4
Measure and analyse the performance of each developed OpenCL version of the program in comparison to the expected performance on the targeted system.
LO4
 
Assessment Task 4: Examination
TASK DESCRIPTION:
This online test will cover all aspects of the unit.

TASK LENGTH:
2 hours
DUE DATE:
Week 14
WEIGHT:
40 %
 
CRITERION #
CRITERION
MEASURES INTENDED LEARNING OUTCOME
1
Explain concepts of high-performance computer architecture.
LO1
2
Develop solutions for efficient multicore CPU and GPU programs.
LO2, LO3
3
Evaluate the strengths and weaknesses of potential high-performance computing solutions.
LO4
 
Assessment Task 5: In-Tutorial Assessment
TASK DESCRIPTION:
These in-semester assessments support the understanding of the unit content. These are due throughout the semester. You will be quizzed on aspects of high-performance computer architecture and you will be implementing solutions for high-performance architecture and timing their execution and analysing the times against expected results, and explaining the reasons behind the observed performance.

TASK LENGTH:
N/A
DUE DATE:
Refer to Assessment Description
WEIGHT:
15 %
 
CRITERION #
CRITERION
MEASURES INTENDED LEARNING OUTCOME
1
Develop and evaluate high-performance implementations
LO2, LO3, LO4
2
Apply concepts of high-performance computer architecture and programming techniques targeting aspects of this architecture.
LO1, LO4
 
 
 
How your final result is determined
To pass this unit, you need to demonstrate your attainment of each of the Intended Learning Outcomes, achieve a final unit grade of 50% or greater, and pass any hurdle tasks.
 
Submission of assignments
Where practicable, assignments should be submitted to an assignment submission folder in MYLO. You must submit assignments by the due date or receive a penalty (unless an extension of time has been approved by the Unit Coordinator). Students submitting any assignment in hard copy, or because of a practicum finalisation, must attach a student cover sheet and signed declaration for the submission to be accepted for marking.
 
Requests for extensions
If you are unable to submit an assessment task by the due date, you should apply for an extension.
A request for an extension should first be discussed with your Unit Coordinator or teaching support team where possible. A request for an extension must be submitted by the assessment due date, except where you can provide evidence it was not possible to do so. Typically, an application for an extension will be supported by documentary evidence: however, where it is not possible for you to provide evidence please contact your Unit Coordinator.
The Unit Coordinator must notify you of the outcome of an extension request within 3 working days of receiving the request.
Late Penalties
Assignments submitted after the deadline will receive a late penalty of 5% of the original available mark for each calendar day (or part day) that the assignment is late. Late submissions will not be accepted more than 10 calendar days after the due date, or after assignments have been returned to other students on a scheduled date, whichever occurs first. Further information on Late Penalties can be found on the Assessments and Results Procedure.
 
Review of results and appeals
You are entitled to ask for a review of the marking and grading of your assessment task if there is an irregularity in the marking standards or an error in the process for determining the outcome of an assessment. Details on how to request a review of a mark for an assignment are outlined in the Review and Appeal of Academic Decisions Procedure.
 
 
 
Required resources
Required Reading Materials
N/A
 
Recommended Reading Materials
N/A
 
Other Required Resources
COMPUTING FACILITIES
The Discipline of ICT has PC labs, Mac labs, and special purpose Networking labs at the Newnham and Sandy Bay campuses. All students are provided with logins for Windows, Macintosh and Unix environments. If you have not used these facilities before please contact the ICT Help Desk. If you would like to access these facilities after hours please contact the ICT Help Desk.

USE OF FACILITIES
Use of computing facilities provided by the Discipline of ICT is subject to the Discipline's Ethics Guidelines, details of which are posted at http://www.utas.edu.au/technologyenvironmentsdesign/ict/currentstudentresources/ethicsguidelines.

Copies of the guidelines are also available in all ICT labs. The Discipline's facilities may only be used for study related purposes, and may not be used for personal gain. Antisocial behaviour in labs such as game playing, viewing pornography, loud discussion, audio without the use of headphones, etc is strictly prohibited in all labs at all times.

Eating, drinking, and smoking is not permitted in the labs. Before being granted access to the Discipline's facilities, you will be required to sign a declaration that you have read and understand these guidelines, and that you will abide by them. You will also be required to complete the relevant MyLO course to gain access. Disciplinary action may be taken against students who violate the guidelines. Details about gaining access to the labs can be found at ICT Reception.